Chemin:OKDatasheet > Fiche de Semi-conducteurs > Fairchild Datasheet > 74F112SJ
74F112SJ spec: Dual JK Negative Edge-Triggered Flip-Flop
74F112SJ similaires
- 74F1056SCX
- 8-Bit Schottky Barrier Diode Array
- 74F1071MSA
- 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
- 74F1071MSAX
- 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
- 74F1071MTC
- 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
- 74F1071MTCX
- 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
- 74F1071SC
- 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
- 74F1071SCX
- 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
- 74F109PC
- Dual JK# Positive Edge-Triggered Flip-Flop
74F112SJ Datasheet et spécifications
Fabricant : Fairchild
Emballage : SOIC
Pins : 16
Température : Min 0 °C | Max 0 °C
Taille : 64 KB
Application : Dual JK Negative Edge-Triggered Flip-Flop
74F112SJ PDF Download