Chemin:OKDatasheet > Fiche de Semi-conducteurs > Fairchild Datasheet > DM74S112N
DM74S112N spec: Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs
Chemin:OKDatasheet > Fiche de Semi-conducteurs > Fairchild Datasheet > DM74S112N
DM74S112N spec: Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs
Fabricant : Fairchild
Emballage : MDIP
Pins : 16
Température : Min 0 °C | Max 0 °C
Taille : 47 KB
Application : Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs