HC2509C spec: Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM

HC2509C similaires

HC2509C
- Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM
HC2510C
- Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM

HC2509C Datasheet et spécifications

Fabricant : Hyundai

Emballage : TSSOP

Pins : 24

Température : Min 0 °C | Max 85 °C

Taille : 92 KB

Application : Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM