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IW4042BD spec: Quad cloced D latch, high-voltage silicon-gate CMOS
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IW4042BD Datasheet et spécifications
Fabricant : Integral
Emballage : SOIC
Pins : 16
Température : Min -55 °C | Max 125 °C
Taille : 194 KB
Application : Quad cloced D latch, high-voltage silicon-gate CMOS
IW4042BD PDF Download