ISPLSI3256-50LG spec: High density programmable logic, 128 I/O pins, 11000 PLD gates, 384 registers, 57MHz

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ISPLSI3256-50LG Datasheet et spécifications

Fabricant : Lattice

Emballage : CPGA

Pins : 167

Température : Min 0 °C | Max 70 °C

Taille : 1126 KB

Application : High density programmable logic, 128 I/O pins, 11000 PLD gates, 384 registers, 57MHz