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M5-512/184-12HI spec: 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
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M5-512/184-12HI Datasheet et spécifications
Fabricant : Lattice
Emballage : PQFP
Pins : 100
Température : Min -40 °C | Max 85 °C
Taille : 1126 KB
Application : 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5-512/184-12HI PDF Download