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M5LV-128/120-12YC spec: 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-128/120-12YC similaires
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- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
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- 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
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M5LV-128/120-12YC Datasheet et spécifications
Fabricant : Lattice
Emballage : PQFP
Pins : 100
Température : Min 0 °C | Max 70 °C
Taille : 1126 KB
Application : 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-128/120-12YC PDF Download