Chemin:OKDatasheet > Fiche de Semi-conducteurs > Lattice Datasheet > M5LV-256/104-12YC
M5LV-256/104-12YC spec: 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-256/104-12YC similaires
- M5LV-128/104-10VC
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-10VI
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-10YC
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-10YI
- 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-12VC
- 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-12VI
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-12YI
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-15VI
- 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-256/104-12YC Datasheet et spécifications
Fabricant : Lattice
Emballage : PQFP
Pins : 100
Température : Min 0 °C | Max 70 °C
Taille : 1126 KB
Application : 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-256/104-12YC PDF Download