MACHLV210-12JC spec: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 12ns

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MACHLV210-12JC Datasheet et spécifications

Fabricant : Lattice

Emballage : PLCC

Pins : 44

Température : Min 0 °C | Max 70 °C

Taille : 243 KB

Application : High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 12ns