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PHD50N06LT spec: 55 V, trenchMOS transistor logic level FET
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PHD50N06LT Datasheet et spécifications
Fabricant : Philips
Emballage : SOT
Pins : 3
Température : Min -55 °C | Max 175 °C
Taille : 71 KB
Application : 55 V, trenchMOS transistor logic level FET
PHD50N06LT PDF Download