Chemin:OKDatasheet > Fiche de Semi-conducteurs > TI Datasheet > CD74HC107M
CD74HC107M spec: HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET
CD74HC107M similaires
- CD74AC00E
- QUAD 2-INPUT NAND GATES
- CD74AC00M
- QUAD 2-INPUT NAND GATES
- CD74AC00M96
- QUAD 2-INPUT NAND GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02M
- QUAD 2-INPUT NOR GATES
- CD74AC02M96
- QUAD 2-INPUT NOR GATES
CD74HC107M Datasheet et spécifications
Fabricant : TI
Emballage :
Pins : 14
Température : Min -55 °C | Max 125 °C
Taille : 61 KB
Application : HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET
CD74HC107M PDF Download
