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CD74HC73E spec: HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET
CD74HC73E similaires
- CD74AC00E
- QUAD 2-INPUT NAND GATES
- CD74AC00M
- QUAD 2-INPUT NAND GATES
- CD74AC00M96
- QUAD 2-INPUT NAND GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02M
- QUAD 2-INPUT NOR GATES
- CD74AC02M96
- QUAD 2-INPUT NOR GATES
CD74HC73E Datasheet et spécifications
Fabricant : TI
Emballage :
Pins : 14
Température : Min -55 °C | Max 125 °C
Taille : 62 KB
Application : HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET
CD74HC73E PDF Download
