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CD74HCT109M spec: HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET
CD74HCT109M similaires
- CD74AC00E
- QUAD 2-INPUT NAND GATES
- CD74AC00M
- QUAD 2-INPUT NAND GATES
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- QUAD 2-INPUT NAND GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02M
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- CD74AC02M96
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CD74HCT109M Datasheet et spécifications
Fabricant : TI
Emballage :
Pins : 16
Température : Min -55 °C | Max 125 °C
Taille : 63 KB
Application : HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET
CD74HCT109M PDF Download
